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Application : The MAX 9000 family of in-system-programmable, high-density, high-performance EPLDs is based on Alteras third-generation MAX architecture. Fabricated on an advanced CMOS technology, the EEPROM based MAX 9000 family provides 6,000 to 12,000 usable gates, pin-to-pin delays as fast as 10 ns, and counter speeds of up to 144 MHz. The -10 speed grade of the MAX 9000 family is compliant with the PCI Local Bus Specification, Revision 2.2. Table 3 shows the speed grades available for MAX 9000 devices.
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Minimum Order : 1 piece
Place of Origin : china
Category : Bus Parts
EPM9320ALC84-10-Programmable Logic Device Family-ALTERA Images